Execution Constraint Verification of Exception Handling on UML Sequence Diagrams


Share/Save/Bookmark

Ciraci, Selim and Sözer, Hasan and Aksit, Mehmet and Havinga, Wilke (2011) Execution Constraint Verification of Exception Handling on UML Sequence Diagrams. In: Fifth IEEE International Conference on Secure Software Integration and Reliability Improvement, SSIRI 2011, 27-29 June 2011, Jeju Island, Korea (pp. pp. 31-40).

[img] PDF
Restricted to UT campus only
: Request a copy
348kB
Abstract:Exception handling alters the control flow of the program. As such, errors introduced in exception handling code may influence the overall program in undesired ways. To detect such errors early and thereby decrease the programming costs, it is worthwhile to consider exception handling at design level. Preferably, design models must be extended to incorporate exception handling behavior and the control flow must be verified accordingly. Common practices for verification require a formal model and semantics of the design. Defining semantics and manually converting design models to formal models are costly. We propose an approach for verifying exception handling in UML design models, where we extend UML with exception handling notations, define execution and exception handling semantics, and automatically transform UML models to a formal model. The formal model is used for generating execution paths. Constraints are specified (as temporal logic formulas) on execution paths and are verified.
Item Type:Conference or Workshop Item
Copyright:© 2011 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/77957
Official URL:http://dx.doi.org/10.1109/SSIRI.2011.13
Export this item as:BibTeX
EndNote
HTML Citation
Reference Manager

 

Repository Staff Only: item control page