Phase locked loop

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Beek van de, Remco Cornelis Herman and Klumperink, Eric Antonius Maria and Nauta, Bram and Vaucher, Cicero Silveira (2007) Phase locked loop. Patent.

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Abstract:A phase locked loop comprising a phase detector ( 100 ) for determining a phase difference between a reference signal (Ref) and mutually phase shifted signals (I, Q) to generate frequency control signals (U, D), the phase detector ( 100 ) comprising: means ( 10 ) for obtaining a first one of said frequency control signals (U, D) by binary multiplication of the reference signal (Ref) and one of the relative phase shifted signals (I, Q); and means ( 20 ) for obtaining a second one of said frequency control signals (U, D) by binary multiplication of the relative phase shifted signals (I, Q).
Item Type:Patent
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/75697
Official URL:http://v3.espacenet.com/publicationDetails/biblio?CC=US&NR=7218157B2&KC=B2&FT=D&date=20070515&DB=EPODOC&locale=en_V3
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