A 2.4GHz 830pJ/bit duty-cycled wake-up receiver with −82dBm sensitivity for crystal-less wireless sensor nodes

Drago, S. and Leenaerts, D.M.W. and Sebastiano, F. and Breems, L.J. and Makinwa, K.A.A. and Nauta, B. (2010) A 2.4GHz 830pJ/bit duty-cycled wake-up receiver with −82dBm sensitivity for crystal-less wireless sensor nodes. In: Solid-State Circuits Conference Digest of Technical Papers (ISSCC) 2010 IEEE International, 7-11 Feb 2010, San Francisco.

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Abstract:	A 65 nm CMOS 2.4 GHz wake-up receiver operating with low-accuracy frequency references has been realized. Robustness to frequency inaccuracy is achieved by employing non-coherent energy detection, broadband-IF heterodyne architecture and impulse-radio modulation. The radio dissipates 415 Â¿W at 500 kb/s and achieves a sensitivity of -82 dBm with an energy efficiency of 830 pJ/bit.
Item Type:	Conference or Workshop Item
Copyright:	IEEE
Faculty:	Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:	Integrated Circuit Design (ICD)
Link to this item:	http://purl.utwente.nl/publications/72397
Official URL:	http://dx.doi.org/10.1109/ISSCC.2010.5433955
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