A lattice representational definition of a hierarchy of instructional processors usable in educational courseware

De Diana, I.P.F. and Vos, H.J. (1988) A lattice representational definition of a hierarchy of instructional processors usable in educational courseware. Computers & Education, 12 (3). pp. 427-434. ISSN 0360-1315

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Abstract:	The basic “recognize-act-recognize-end” cycle can be recognized in elementary as well as in more advanced forms of CAI. This article attempts to offer a unifying formal framework in which different elaborations of this cycle (embodied in a “processor”) can be placed. Three different levels of elaboration are distinguished which can be considered to be situated into the nodes of a lattice of models of the instructional process. A formal definition of such a framework can serve at least two functions. In the first place a uniform and precise definition of various elaborations can be given and new elaborations can be created in a logically funded way. Secondly, such a framework can support the modelling of instructional processes and the stimulation of student behavior. Thus, pre-testing of courseware could become feasible. Aspects of the framework have been used to implement two prototypes of support systems for the development of CAI courseware.
Item Type:	Article
Copyright:	© 1988 Elsevier Science
Faculty:	Behavioural Sciences (BS)
Research Group:	Research Methodology, Measurement and Data Analysis (OMD)
Link to this item:	http://purl.utwente.nl/publications/68006
Official URL:	http://dx.doi.org/10.1016/0360-1315(88)90038-3
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