A High-Voltage Level Tolerant Transistor Circuit

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Annema, Anne Johan and Geelen, Godefridus Johannes Gertrudis Maria (2001) A High-Voltage Level Tolerant Transistor Circuit. Patent.

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Abstract:A high-voltage level tolerant transistor circuit, comprising a plurality of cascoded transistors, including a first transistor (T1) operatively connected to a high-voltage level node (3) and a second transistor (T2) operatively connected to a low-voltage level node (2). The first transistor (T1) connects to a biasing circuit (8), such as a voltage level shifter, providing a variable biasing level (V1) relative to a voltage level (VH) at the high-voltage level node (3).
Item Type:Patent
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
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Link to this item:http://purl.utwente.nl/publications/67429
Official URL:http://v3.espacenet.com/textdoc?IDX=US6320414
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