Cyclostationary Feature Detection on a tiled-SoC


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Kokkeler, André B.J. and Smit, Gerard J.M. and Krol, Thijs and Kuper, Jan (2007) Cyclostationary Feature Detection on a tiled-SoC. In: Design, Automation & Test in Europe Conference & Exhibition, DATE 2007, 16-20 April 2007, Nice, France.

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Abstract:In this paper, a two-step methodology is introduced to analyse the mapping of Cyclostationary Feature Detection (CFD) onto a multi-core processing platform. In the first step, the tasks to be executed by each core are determined in a structured way using techniques known form the design of array processors. In the second step, the implementation of tasks on a processing core is analysed. Using this methodology, it is shown that calculating a 127 x 127 Discrete Spectral Correlation Function requires approximately 140 microseconds on a tiled System on Chip (SoC) with 4 Montium cores.
Item Type:Conference or Workshop Item
Copyright:© 2007 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/67112
Official URL:http://dx.doi.org/10.1109/DATE.2007.364586
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