Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard

Dam, A.C. and Lammertink, M.G.J. and Rovers, K.C. and Slagman, J. and Wellink, A.M. and Rauwerda, G.K. and Smit, G.J.M. (2006) Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard. In: Proceedings of the 9th EUROMICRO Conference on DIGITAL SYSTEM DESIGN Architectures, Methods and Tools (DSD 2006), August 30 - September 1, 2006, Dubrovnik, Croatia.

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Abstract:	This paper addresses the implementation of Reed- Solomon decoding for battery-powered wireless devices. The scope of this paper is constrained by the Digital Media Broadcasting (DMB). The most critical element of the Reed-Solomon algorithm is implemented on two different reconfigurable hardware architectures: an FPGA and a coarse-grained architecture: the Montium, The remaining parts are executed on an ARM processor. The results of this research show that a co-design of the ARM together with an FPGA or a Montium leads to a substantial decrease in energy consumption. The energy consumption of syndrome calculation of the Reed- Solomon decoding algorithm is estimated for an FPGA and a Montium by means of simulations. The Montium proves to be more efficient.
Item Type:	Conference or Workshop Item
Faculty:	Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:	Computer Architecture for Embedded Systems (CAES)
Link to this item:	http://purl.utwente.nl/publications/66208
Official URL:	http://doi.ieeecomputersociety.org/10.1109/DSD.2006.59
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