A sub-1-V Bandgap Voltage Reference in 32nm FinFET Technology


Annema, A.J. and Veldhorst, P. and Doornbos, G. and Nauta, B. (2009) A sub-1-V Bandgap Voltage Reference in 32nm FinFET Technology. In: IEEE International Solid-State Circuits Conference, ISSCC 2009, 8-12 February 2009, San Francisco, CA, USA (pp. pp. 332-333).

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Abstract:The bulk CMOS technology is expected to scale down to about 32nm node and likely the successor would be the FinFET. The FinFET is an ultra-thin body multi-gate MOS transistor with among other characteristics a much higher voltage gain compared to a conventional bulk MOS transistor [1]. Bandgap reference circuits cannot be directly ported from bulk CMOS technologies to SOI FinFET technologies, because both conventional diodes cannot be realized in thin SOI layers and also, area-efficient resistors are not readily available in processes with only metal(lic) gates. In this paper, a sub-1V bandgap reference circuit is implemented in a 32nm SOI FinFET technology, with an architecture that significantly reduces the required total resistance value.
Item Type:Conference or Workshop Item
Copyright:© 2009 IEEE
Electrical Engineering, Mathematics and Computer Science (EEMCS)
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Link to this item:http://purl.utwente.nl/publications/65428
Official URL:https://doi.org/10.1109/ISSCC.2009.4977443
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