Net Negative Charge in low-temperature SiO2 gate dielectric layers

Share/Save/Bookmark

Boogaard, A. and Kovalgin, A.Y. and Wolters, R.A.M. (2009) Net Negative Charge in low-temperature SiO2 gate dielectric layers. Microelectronic Engineering, 86 (7-9). pp. 1707-1710. ISSN 0167-9317

[img]PDF
Restricted to UT campus only
: Request a copy
436Kb
Abstract:SiO2 gate dielectric layers (4–60 nm) were grown (0.6 nm/min) by plasma-enhanced chemical vapor deposition (PECVD) in strongly diluted silane plasmas at low substrate temperatures. In contrast to the well-accepted positive charge for thermally grown silicon dioxide, the net oxide charge was negative and a function of layer thickness. Our experiments suggested that the negative charge was created due to unavoidable oxidation of the silicon surface by plasma species, and the CVD component added a positive space charge to the deposited oxide. The net charge was negative under process conditions where plasma oxidation played a major role. Such conditions include low deposition rates and the growth of relatively thin layers.
Item Type:Article
Copyright:© 2009 Elsevier
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/62800
Official URL:http://dx.doi.org/10.1016/j.mee.2009.03.124
Export this item as:BibTeX
EndNote
HTML Citation
Reference Manager

 

Repository Staff Only: item control page