A Low-Offset Double-Tail Latch-Type Voltage Sense Amplifier

Schinkel, D. and Mensink, E. and Klumperink, E.A.M. and Tuijl van, A.J.M. and Nauta, B. (2007) A Low-Offset Double-Tail Latch-Type Voltage Sense Amplifier. In: ProRISC 2007, 18th Annual Workshop on Circuits, Systems and Signal Processing, 29-30 Nov 2007, Veldhoven, the Netherlands.

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Abstract:	A latch-type voltage sense amplifier in 90nm CMOS is designed with a separated input and cross-coupled stage. This separation enables fast operation over a wide common-mode and supply voltage range. With a one-sigma offset of 8mV, the circuit consumes 92fJ/decision at 1.2V supply. It has an input equivalent noise of 1.5mV and requires only 18ps setup plus hold time.
Item Type:	Conference or Workshop Item
Faculty:	Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:	Integrated Circuit Design (ICD)
Link to this item:	http://purl.utwente.nl/publications/62159
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