A test chip for automatic reliability measurements of interconnect vias


Share/Save/Bookmark

Lippe, K. and Hasper, A. and Elfrink, G.W. and Niehof, J. and Kerkhoff, H.G. (1992) A test chip for automatic reliability measurements of interconnect vias. In: 30th Annual International Reliability Physics Symposium, 31 March-2 April 1992 , San Diego, CA (pp. pp. 247-250).

open access
[img]
Preview
PDF
280kB
Abstract:A test circuit for electromigration reliability measurements was designed and tested. The device under test (DUT) is a via-hole chain. The test circuit permits simultaneous measurements of a number of DUTs, and a fatal error of one DUT does not influence the measurement results of the other DUTs. Measurements require only a few measurement instruments. Comparing the measurement results of a single DUT io the measurement results of the test circuit shows that the test circuit may be used for reliability measurements.
Item Type:Conference or Workshop Item
Copyright:© 1992 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/58965
Official URL:http://dx.doi.org/10.1109/RELPHY.1992.187653
Export this item as:BibTeX
EndNote
HTML Citation
Reference Manager

 

Repository Staff Only: item control page

Metis ID: 112932