A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time

Schinkel, Daniël and Mensink, Eisse and Klumperink, Eric and Tuijl van, Ed (2007) A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time. In: Digest of Technical Papers. IEEE International Solid-State Circuits Conference, 2007. ISSCC 2007. IEEE, pp. 314-315. ISBN 9781424408535

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Abstract:	A latch-type voltage sense amplifier in 90nm CMOS is designed with a separated input and cross-coupled stage. This separation enables fast operation over a wide common-mode and supply voltage range. With a 1-sigma offset of 8mV, the circuit consumes 92fJ/decision with a 1.2V supply. It has an input equivalent noise of 1.5mV and requires 18ps setup-plus-hold time
Item Type:	Book Section
Copyright:	© 2007 IEEE
Faculty:	Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:	Integrated Circuit Design (ICD)
Link to this item:	http://purl.utwente.nl/publications/58146
Official URL:	http://dx.doi.org/10.1109/ISSCC.2007.373420
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