Slew rate induced distortion in switched-resistor integrators

Jiraseree-amornkun, A. and Worapishet, A. and Klumperink, E.A.M. and Nauta, B. and Surakampontorn, W. (2006) Slew rate induced distortion in switched-resistor integrators. In: Proceedings of the 2006 IEEE International Symposium on Circuits and Systems, ISCAS 2006. IEEE, pp. 2485-2488. ISBN 9780780393899

Preview

PDF
1618Kb

Abstract:	Opamp-RC integrators built with linear resistors and capacitors can achieve very high linearity. By means of a switched resistor, tuning of the RC time-constant is possible via the duty-cycle of the clock controlling the switched resistor. This paper analyzes the effect of opamp slew rate limitations on the distortion of a switched-resistor lossy opamp-RC integrator. We show via analysis and simulations that the use of two sets of switched resistors instead of one relaxes the opamp slew rate requirements, and reduces the resulting distortion significantly.
Item Type:	Book Section
Copyright:	© 2006 IEEE
Faculty:	Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:	Integrated Circuit Design (ICD)
Link to this item:	http://purl.utwente.nl/publications/58141
Official URL:	http://dx.doi.org/10.1109/ISCAS.2006.1693127
Export this item as:	BibTeX EndNote HTML Citation Reference Manager

Show download statistics for this publication

Repository Staff Only: item control page

Metis ID: 238086