C-V test structures for metal gate CMOS
Bankras, Radko G. and Tiggelman, Mark P.J. and Negara, M. Adi and Sasse, Guido T. and Schmitz, Jurriaan (2006) C-V test structures for metal gate CMOS. In: International Conference on Microelectronic Test Structures, ICMTS, March 6-9, 2006, Austin, Texas, USA.
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| Abstract: | Gate leakage has complicated the layout and measurement of C-V test structures. In this paper the impact of metal gate introduction to C-V test structure design is discussed. The metal gate allows for wider-gate structures and for the application of n/sup +/-/sup p-/ diffusion edges. We show, both theoretically and with experimental data, the impact of both design modifications on C-V measurement results. |
| Item Type: | Conference or Workshop Item |
| Copyright: | © 2006 IEEE |
| Faculty: | Electrical Engineering, Mathematics and Computer Science (EEMCS) |
| Research Group: | |
| Link to this item: | http://purl.utwente.nl/publications/57650 |
| Official URL: | http://dx.doi.org/10.1109/ICMTS.2006.1614309 |
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