Fabrication of multi-layer substrates for high aspect ratio single crystalline microstructures

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Gui, C. and Boer de, M. and Gardeniers, J.G.E. and Jansen, H. and Berenschot, J.W. and Elwenspoek, M. (1998) Fabrication of multi-layer substrates for high aspect ratio single crystalline microstructures. Sensors and Actuators A: Physical, 70 (1-2). pp. 61-66. ISSN 0924-4247

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Abstract:This paper reports a new method for making multi-layer substrates (MLS) for high aspect ratio single crystalline movable microstructures using a group of technologies, such as direct wafer bonding (DWB), chemical mechanical polishing (CMP), and reactive ion etching (RIE). As a first example, Si-SiO2-polySi-SiO2-Si sandwich wafers were fabricated using CMP and DWB. Subsequently, free-standing micro cantilever beams and double side clamped bridges were fabricated on these sandwich wafers using a one-run self-aligned RIE process, where polysilicon was used as the sacrificial layer. Polishing and bonding of low pressure chemical vapour deposition (LPCVD) polysilicon were studied. An LPCVD Si3+xN4 polishing stop layer technique was presented to accurately control the final thickness of the device layer. The uniformity of the device layer was improved as well.
Item Type:Article
Copyright:© 1998 Elsevier B.V.
Faculty:
Science and Technology (TNW)
Electrical Engineering, Mathematics and Computer Science (EEMCS)
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Link to this item:http://purl.utwente.nl/publications/55976
Official URL:http://dx.doi.org/10.1016/S0924-4247(98)00113-7
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