An Energy-Efficient Reconfigurable Circuit Switched Network-on-Chip


Share/Save/Bookmark

Wolkotte, Pascal T. and Smit, Gerard J.M. and Rauwerda, Gerard K. and Smit, Lodewijk T. (2005) An Energy-Efficient Reconfigurable Circuit Switched Network-on-Chip. In: 19th IEEE International Parallel and Distributed Processing Symposium, IPDPS - 12th Reconfigurable Architecture Workshop, RAW, 4-8 April 2005, Denver, Colorado, USA.

[img]
Preview
PDF
173Kb
Abstract:Network-on-Chip (NoC) is an energy-efficient on-chip communication architecture for multi-tile System-on-Chip (SoC) architectures. The SoC architecture, including its run-time software, can replace inflexible ASICs for future ambient systems. These ambient systems have to be flexible as well as energy-efficient. To find an energy-efficient solution for the communication network we analyze three wireless applications. Based on their communication requirements we observe that revisiting of the circuit switching techniques is beneficial. In this paper we propose a new energy-efficient reconfigurable circuit-switched Network-on-Chip. By physically separating the concurrent data streams we reduce the overall energy consumption. The circuit-switched router has been synthesized and analyzed for its power consumption in 0.13 ¿m technology. A 5-port circuit-switched router has an area of 0.05 mm2 and runs at 1075 MHz. The proposed architecture consumes 3.5 times less energy compared to its packet-switched equivalent
Item Type:Conference or Workshop Item
Copyright:© 2005 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/54746
Official URL:http://dx.doi.org/10.1109/IPDPS.2005.95
Export this item as:BibTeX
EndNote
HTML Citation
Reference Manager

 

Repository Staff Only: item control page

Metis ID: 229212