Analog/RF Circuit Design Techniques for Nanometerscale IC Technologies

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Nauta, Bram and Annema, Anne-Johan (2005) Analog/RF Circuit Design Techniques for Nanometerscale IC Technologies. In: 31st European Solid-State Circuits Conference, ESSCIRC 2005, September 12-16, 2005, Grenoble, France.

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Abstract:CMOS evolution introduces several problems in analog design. Gate-leakage mismatch exceeds conventional matching tolerances requiring active cancellation techniques or alternative architectures. One strategy to deal with the use of lower supply voltages is to operate critical parts at higher supply voltages, by exploiting combinations of thin- and thick-oxide transistors. Alternatively, low voltage circuit techniques are successfully developed. In order to benefit from nanometer scale CMOS technology, more functionality is shifted to the digital domain, including parts of the RF circuits. At the same time, analog control for digital and digital control for analog emerges to deal with current and upcoming imperfections.
Item Type:Conference or Workshop Item
Copyright:© 2005 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/54684
Official URL:http://dx.doi.org/10.1109/ESSCIR.2005.1541556
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Metis ID: 229033