Energy model of network-on-chip and a bus


Wolkotte, Pascal T. and Smit, Gerard J.M. and Kavaldjiev, Nikolay and Becker, Jens E. and Becker, Jurgen (2005) Energy model of network-on-chip and a bus. [Report]

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Abstract:A Network-on-Chip (NoC) is an energy-efficient onchip communication architecture for Multi-Processor Systemon- Chip (MPSoC) architectures. In earlier papers we proposed two Network-on-Chip architectures based on packet-switching and circuit-switching. In this paper we derive an energy model for both NoC architectures to predict their energy consumption per transported bit. Both architectures are also compared with a traditional bus architecture. The energy model is primarily needed to find a near optimal run-time mapping (from an energy point of view) of inter-process communication to NoC links.
Item Type:Report
Copyright:© 2005 CTIT
Electrical Engineering, Mathematics and Computer Science (EEMCS)
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