Strategies to Cope with Plasma Charging Damage in Design and Layout Phases


Share/Save/Bookmark

Wang, Z. and Ackaert, J. and Scarpa, A. and Salm, C. and Kuper, F.G. and Vugts, M. (2005) Strategies to Cope with Plasma Charging Damage in Design and Layout Phases. In: International Conference on Integrated Circuit Design and Technology, ICICDT, 9-11 May 2005, Austin, Texas, USA (pp. pp. 91-98).

open access
[img]
Preview
PDF
1MB
Abstract:In this paper, strategics to cope with plasma charging damage in design and layout phases are discussed. A semi-empirical model is addressed first. With this model, a designer is able to predict the plasma charging induced yield loss of the circuit, if the antenna ratio (AR) distribution of the circuit is available. Then a novel first order self-balancing interconnect layout design is proposed to reduce the plasma charging damage. Moreover, the temperature effect on the protection diode is discussed and a strategic diode protection scheme for plasma charging damage is proposed. In addition to these general methods, a set of design rules is given to protect floating metal-insulator-metal (MIM) capacitors from plasma charging damage.
Item Type:Conference or Workshop Item
Copyright:© 2005 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/51076
Official URL:http://dx.doi.org/10.1109/ICICDT.2005.1502600
Export this item as:BibTeX
EndNote
HTML Citation
Reference Manager

 

Repository Staff Only: item control page

Metis ID: 224039