Overview of the Tool-Flow for the Montium Processor Tile


Smit, Gerard J.M. and Rosien, Michel A.J. and Guo, Yuanqing and Heysters, Paul M. (2004) Overview of the Tool-Flow for the Montium Processor Tile. In: International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 2004, June 21-24, 2004, Las Vegas, Nevada, USA (pp. pp. 45-51).

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Abstract:This paper presents an overview of a tool chain to support a transformational design methodology. The tool can be used to compile code written in a high level source language, like C, to a coarse grain reconfigurable architecture. The source code is first translated into a Control Data Flow Graph (CDFG). A Control Dataflow Graph contains not only the dataflow operations (e.g. arithmetic or logical operations on data) but also control flow operations (e.g. operators for loop and if then else constructs). The CDFG is minimized using a set of behavior preserving transformations such as dependency analysis, common sub-expression elimination, etc. After applying graph clustering, scheduling and allocation transformations on this minimized graph, it can be mapped onto the target architecture.
Item Type:Conference or Workshop Item
Copyright:© 2004 CSREA Press
Electrical Engineering, Mathematics and Computer Science (EEMCS)
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Link to this item:http://purl.utwente.nl/publications/49365
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