Energy-Efficiency of the Montium Reconfigurable Tile Processor


Share/Save/Bookmark

Heysters, Paul M. and Smit, Gerard J.M. and Molenkamp, Egbert (2004) Energy-Efficiency of the Montium Reconfigurable Tile Processor. In: International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA 2004, June 21-24, 2004, Las Vegas, Nevada, USA (pp. pp. 38-55).

open access
[img]
Preview
PDF
585kB
Abstract:Primary requirements of wireless multimedia handheld computers are high-performance, flexibility, energy-efficiency and low costs. A compromise for these contradicting requirements can be found in a heterogeneous SoC. Besides conventional architectures such a SoC contains domain specific coarse grain reconfigurable processors and fine-grain reconfigurable entities. The MONTIUM is a prototype of a novel coarsegrain reconfigurable processor. The SoC template offers a balance between flexibility, efficiency and performance. In this paper the energy and performance characteristics of the MONTIUM are compared with the characteristics of other state-of-the-art (reconfigurable) architectures.
Item Type:Conference or Workshop Item
Copyright:© 2004 CSREA Press
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/49364
Export this item as:BibTeX
EndNote
HTML Citation
Reference Manager

 

Repository Staff Only: item control page

Metis ID: 221625