An energy-efficient Network-on-Chip for a heterogeneous tiled reconfigurable System-on-Chip


Share/Save/Bookmark

Kavaldjiev, N.K. and Smit, G.J.M. (2004) An energy-efficient Network-on-Chip for a heterogeneous tiled reconfigurable System-on-Chip. In: Euromicro Symposium on Digital System Design, 2004. DSD.

[img]
Preview
PDF
566Kb
Abstract:This paper proposes a Network-on-Chip architecture that offers high flexibility and performance. It is used in a System-on-Chip platform for future multimedia mobile devices. The network is packet switching wormhole network with virtual-channel flow control and source routing. The initial implementation results for a network router show its feasibility and size comparable with other available solutions.
Item Type:Conference or Workshop Item
Copyright:©2004 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/48650
Official URL:http://dx.doi.org/10.1109/DSD.2004.1333317
Export this item as:BibTeX
EndNote
HTML Citation
Reference Manager

 

Repository Staff Only: item control page

Metis ID: 220310