Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture


Share/Save/Bookmark

Smit, Lodewijk T. and Smit, Gerard J.M. and Hurink, Johann L. and Broersma, Hajo and Paulusma, Daniël and Wolkotte, Pascal T. (2004) Run-time mapping of applications to a heterogeneous reconfigurable tiled system on chip architecture. In: IEEE International Conference on Field-Programmable Technology, FPT 2004, December 6-8, 2004, Brisbane, Australia.

[img]
Preview
PDF
138Kb
Abstract:This paper evaluates an algorithm that maps a number of communicating processes to a heterogeneous tiled System on Chip (SoC) architecture at run-time. The mapping algorithm minimizes the total amount of energy consumption, while still providing an adequate Quality of Service (QoS). A realistic example is mapped using this algorithm.
Item Type:Conference or Workshop Item
Copyright:© 2004 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/48501
Official URL:http://dx.doi.org/10.1109/FPT.2004.1393315
Export this item as:BibTeX
EndNote
HTML Citation
Reference Manager

 

Repository Staff Only: item control page

Metis ID: 220029