Gate-capacitance extraction from RF C-V measurements


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Sasse, G.T. and Kort, R. de and Schmitz, J. (2004) Gate-capacitance extraction from RF C-V measurements. In: 34th European Solid-State Device Research Conference, ESSDERC 2004, 21-23 September 2004, Leuven, Belgium (pp. pp. 113-116).

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Abstract:In this work, a full two-port analysis of an RF C-V measurement set-up is given. This two-port analysis gives insight on the limitations of the commonly used gate capacitance extraction, based on the Y/sub 11/ parameter of the device. It is shown that the parasitics of the device can disturb the extracted gate capacitance and a new extraction scheme, based on the Z-matrix, is introduced that eliminates the effect of these parasitics. Measurement results prove the validity of this new extraction scheme, under different conditions.
Item Type:Conference or Workshop Item
Copyright:©2004 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/47970
Official URL:http://dx.doi.org/10.1109/ESSDER.2004.1356501
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Metis ID: 219035