Scan Test Strategy for Asynchronous-Synchronous Interfaces

Petre, Octvian and Kerkhoff, Hans G. (2003) Scan Test Strategy for Asynchronous-Synchronous Interfaces. In: Eighth IEEE European Test Workshop, 25-28 May 2003, Maastricht, The Netherlands.

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Abstract:	In the next few years, the well-known synchronous design style will not be able to keep pace with the increase of speed and capabilities of integration of advanced processes. Asynchronous design will become more and more common among digital designs, while synchronous-asynchronous interactions will emerge as a key issue in future SoC designs. This paper presents test strategies for 2-phase asynchronous-synchronous, and vice versa, interfaces. It is shown how test vectors can be automatically generated using commercially available ATPG tools. The generated ATPG vectors are able to test all the stuck-at-faults within the asynchronous-synchronous interfaces.
Item Type:	Conference or Workshop Item
Copyright:	©2003 IEEE
Faculty:	Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:	Computer Architecture for Embedded Systems (CAES)
Link to this item:	http://purl.utwente.nl/publications/46399
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