Mapping of DSP Algorithms on the Montium Architecture

Heysters, Paul M. and Smit, Gerard J.M. (2003) Mapping of DSP Algorithms on the Montium Architecture. In: 17th International Parallel & Distributed Processing Symposium, 10th Reconfigurable Architectures Workshop, RAW 2003, 22-26 April 2003, Nice, France.

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Abstract:	In battery operated mobile devices there is a growing need for flexible high-performance architectures due to the limited amount of available energy and the increasing demand of processing power. Course grained reconfigurable architectures could be the key to more energy-efficient, yet programmable systems. In this paper a course-grained reconfigurable architecture, called Montium, is presented. Several mappings of commonly used digital signal processing algorithms are shown to demonstrate the flexibility of this architecture.
Item Type:	Conference or Workshop Item
Copyright:	© 2003 IEEE
Faculty:	Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:	Computer Architecture for Embedded Systems (CAES)
Link to this item:	http://purl.utwente.nl/publications/46379
Official URL:	http://dx.doi.org/10.1109/IPDPS.2003.1213333
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