Mapping Applications to an FPFA Tile

Rosien, Michel A.J. and Guo, Yuanqing and Smit, G.J.M. and Krol, Thijs (2003) Mapping Applications to an FPFA Tile. In: Design, Automation and Test in Europe Conference and Exhibition, 2003, DATE, March 3-7, Munich, Germany.

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Abstract:	This paper introduces a transformational design method which can be used to map code written in a high level source language, like C, to a coarse grain reconfigurable architecture. The source code is first translated into a control data flow graph (CDFG), which is minimized using a set of behaviour preserving transformations, such as dependency analysis, common subexpression elimination, etc. After applying graph clustering, scheduling and allocation transformations on this minimized graph, it can be mapped onto the target architecture.
Item Type:	Conference or Workshop Item
Copyright:	©2003 IEEE
Faculty:	Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:	Computer Architecture for Embedded Systems (CAES)
Link to this item:	http://purl.utwente.nl/publications/46339
Official URL:	http://dx.doi.org/10.1109/DATE.2003.1253764
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