Using a Pulsed Supply Voltage for Delay Faults Testing of Digital Circuits in a Digital Oscillation Environment


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Vermaak, H.J. and Kerkhoff, H.G. and Jordaan, G.D. (2002) Using a Pulsed Supply Voltage for Delay Faults Testing of Digital Circuits in a Digital Oscillation Environment. In: 6th IEEE Africon Conference in Africa, AFRICON 2002, 2-4 Oct. 2002, George, South Africa (pp. pp. 47-52).

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Abstract:High-performance digital circuits with aggressive timing constraints are usually very susceptible to delay faults. Much research done on delay fault detection needs a rather complicated test setup together with precise test clock requirements. In this paper, we propose a test technique based on the digital oscillation test method. The technique, which was simulated in software, consists of sensitizing a critical path in the digital circuit under test and incorporating the path into an oscillation ring. The supply voltage to the oscillation ring is then varied to detect delay and stuck-at faults in the path.
Item Type:Conference or Workshop Item
Copyright:©2002 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/43949
Official URL:http://dx.doi.org/10.1109/AFRCON.2002.1146804
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