A New Test Generation Approach for Embedded Analogue Cores in SoC


Stancic, M. and Fang, L. and Weusthof, M.H.H. and Tijink, R.M.W. and Kerkhoff, H.G. (2002) A New Test Generation Approach for Embedded Analogue Cores in SoC. In: International Test Conference, 2002, 7-10 Oct. 2002, Baltimore, USA (pp. pp. 861-869).

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Abstract:This paper proposes a new test-generation approach for embedded analogue cores in SoC. The key features of this approach are the developed testability-analysis based multifrequency test pattern generation method, the novel PID feedback-based test signal backtrace procedure and the fast tolerance-box propagation algorithm. Moreover, possible DFT solutions are discussed. Finally, this approach has been validated by experiments conducted on a real hardware implementation.
Item Type:Conference or Workshop Item
Copyright:©2002 IEEE
Electrical Engineering, Mathematics and Computer Science (EEMCS)
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Link to this item:http://purl.utwente.nl/publications/43873
Official URL:https://doi.org/10.1109/TEST.2002.1041840
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