High speed VLSI neural network for high-energy physics

Masa, P. and Hoen, K. and Wallinga, H. (1994) High speed VLSI neural network for high-energy physics. In: Fourth International Conference on Microelectronics for Neural Networks and Fuzzy Systems, 26-28 Sept. 1994, Turin, Italy.

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Abstract:	A CMOS neural network IC is discussed which was designed for very high speed applications. The parallel architecture, analog computing and digital weight storage provides unprecedented computing speed combined with ease of use. The circuit classifies up to 70 dimensional vectors within 20 nanoseconds, performing 20 billion (2*1010) multiply-and-add operations per second, and has as high as 28-42 Gbits/second equivalent input bandwidth with less than 1 W dissipation. The synaptic weights can be directly downloaded from a host computer to the on on-chip SRAM. The full-custom, analog-digital chip implements a fully connected feedforward neural network with 70 inputs, 6 hidden layer neurons and one output neuron. A unique solution, a single chip neural network photon trigger for high-energy physics research is provided
Item Type:	Conference or Workshop Item
Copyright:	©1994 IEEE
Research Group:	Integrated Circuit Design (ICD) Semiconductor Components (SC)
Link to this item:	http://purl.utwente.nl/publications/17089
Official URL:	http://dx.doi.org/10.1109/ICMNN.1994.593738
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