Gate-Workfunction Engineering Using Poly-(Si,Ge) for High-Performance 0.18µm CMOS Technology


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Ponomarev, Y.V. and Salm, C. and Schmitz, J. and Woerlee, P.H. and Stolk, P.A. and Gravesteijn, D.J. (1997) Gate-Workfunction Engineering Using Poly-(Si,Ge) for High-Performance 0.18µm CMOS Technology. In: International Electron Devices Meeting, 1997. Technical Digest, Washington DC, USA.

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Abstract:We show that poly-SiGe can be readily integrated as a gate material into an existing CMOS technology to achieve significant increase in the transistor performance. In order to preserve the standard salicidation scheme, a buffer poly-Si layer is introduced in the gate stack. PMOST channel profiles are optimized to account for the change of the gate workfunction. High-performance CMOS 0.18 µm devices are manufactured using p- and n-type poly-Si/Si0.8Ge 0.2 gates
Item Type:Conference or Workshop Item
Copyright:©1997 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Research Group:
Link to this item:http://purl.utwente.nl/publications/16981
Official URL:http://dx.doi.org/10.1109/IEDM.1997.650509
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Metis ID: 113866