Built-In Self-Test Methodology for A/D Converters
Vries de, R. and Zwemstra, T. and Bruis, E.M.J.G. and Regtien, P.P.L. (1997) Built-In Self-Test Methodology for A/D Converters. In: European Design & Test Conference ED&TC, March 17-20, 1997, Paris, France.
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| Abstract: | A (partial) Built-in Self-Test (BIST) methodology is proposed for analog to digital (A/D) converters. In this methodology the number of bits of the A/D converter that needs to be monitored externally in a test is reduced. This reduction depends, among other things, on the frequency of the applied test signal. At low test signal frequencies only the least significant bit (LSB) needs to be monitored and a "full" BIST becomes feasible. An analysis is made of the trade-off between the size of the on-chip test circuitry and the accuracy of this BIST technique |
| Item Type: | Conference or Workshop Item |
| Copyright: | © 1997 IEEE Press |
| Research Group: | |
| Link to this item: | http://purl.utwente.nl/publications/16573 |
| Official URL: | http://dx.doi.org/10.1109/EDTC.1997.582382 |
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