5.5V Tolerant I/O in a 2.5V 0.25um CMOS Technology
Annema, Anne-Johan and Geelen, Govert and Jong de, Peter (2000) 5.5V Tolerant I/O in a 2.5V 0.25um CMOS Technology. In: IEEE Custom Integrated Circuit Conference, CICC 2000, May 21-24, 2000, Orlando, FL, USA.
| PDF Restricted to UT campus only: Request a copy 432Kb |
| Abstract: | Robust high-voltage tolerant U0 that do not need process options is presented, demonstrated on 5.5V tolerant opendrain U0 in a 2.5V 0 . 2 5 C~M OS technology. Circuit techniques limit oxide stress and hot-carrier degradation, resulting in hundreds of years extrapolated lifetime for 5.5V pad voltage swing, 2.2V supply voltage, lOMHz switching frequency. The shown concepts are also implemented in other types of U0 and can easily be scaled towards newer processes. |
| Item Type: | Conference or Workshop Item |
| Copyright: | © 2000 IEEE |
| Faculty: | Electrical Engineering, Mathematics and Computer Science (EEMCS) |
| Research Group: | |
| Link to this item: | http://purl.utwente.nl/publications/16094 |
| Official URL: | http://dx.doi.org/10.1109/CICC.2000.852698 |
| Export this item as: | BibTeX EndNote HTML Citation Reference Manager |
Repository Staff Only: item control page
Metis ID: 112979

Show download statistics for this publication
Show download statistics for this publication