High aspect ratio single crystalline silicon microstructures fabricated with multi layer substrates


Share/Save/Bookmark

Gui, C. and Jansen, H.V. and Berenschot, J.W. and Gardeniers, J.G.E. and Elwenspoek, M. (1997) High aspect ratio single crystalline silicon microstructures fabricated with multi layer substrates. In: International Conference on Solid State Sensors and Actuators, TRANSDUCERS, June 16-19, 1997, Chicago, USA.

[img]
Preview
PDF
788Kb
Abstract: This paper reports a method for making high aspect ratio single crystalline silicon (SCS) microstructures on multi layer substrates using chemical mechanical polishing (CMP), silicon fusion bonding (SFB) and reactive ion etching (RIE) techniques. First Si-SiO2-PolySi-SiO2-Si sandwich wafers were fabricated using CMP and SFB. Then microstructures were fabricated on these sandwich wafers using an one run self-aligned RIE process, where polysilicon was used as the sacrificial layer. Polishing and bonding of low pressure chemical vapour deposition (LPCVD) polysilicon were studied. A LPCVD Si3+xN4 polishing stop layer technique was developed to accurately control the final thickness of the device layer. The uniformity of the device layer was improved as well
Item Type:Conference or Workshop Item
Copyright:©1997 IEEE
Faculty:
Electrical Engineering, Mathematics and Computer Science (EEMCS)
Science and Technology (TNW)
Research Group:
Link to this item:http://purl.utwente.nl/publications/15998
Official URL:http://dx.doi.org/10.1109/SENSOR.1997.613731
Export this item as:BibTeX
EndNote
HTML Citation
Reference Manager

 

Repository Staff Only: item control page

Metis ID: 112880