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Architectures for block Toeplitz systems
Bouras, Ilias and Glentis, George-Othon and Kalouptsidis, Nicholas (1996) Architectures for block Toeplitz systems. Signal Processing, 51 (3). pp. 167-190. ISSN 0165-1684
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| Abstract: | In this paper efficient VLSI architectures of highly concurrent algorithms for the solution of block linear systems with Toeplitz or near-to-Toeplitz entries are presented. The main features of the proposed scheme are the use of scalar only operations, multiplications/divisions and additions, and the local communication which enables the development of wavefront array architecture. Both the mean squared error and the total squared error formulations are described and a variety of implementations are given. |
| Item Type: | Article |
| Copyright: | © 1996 Elsevier Science |
| Faculty: | Electrical Engineering, Mathematics and Computer Science (EEMCS) |
| Research Group: | |
| Link to this item: | http://purl.utwente.nl/publications/15460 |
| Official URL: | http://dx.doi.org/10.1016/0165-1684(96)00041-2 |
| Export this item as: | BibTeX EndNote HTML Citation Reference Manager |
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