RIE lag in high aspect ratio trench etching of silicon


Jansen, Henri and Boer, Meint de and Wiegerink, Remco and Tas, Niels and Smulders, Edwin and Neagu, Cristina and Elwenspoek, Miko (1997) RIE lag in high aspect ratio trench etching of silicon. Microelectronic engineering, 35 (1-4). pp. 45-50. ISSN 0167-9317

open access
Abstract:While etching high 3 aspect ratio trenches into silicon with reactive ion etching (RIE) using an SF6/O2 chemistry it is observed that the etch rate is depending on the mask opening. This effect is known as RIE lag and is caused by the depletion of etching ions and radicals or inhibiting neutrals during their trench passage. In order to decide which source is the main cause, we constructed special "horizontal trenches" where only radicals are controlling the etching. The experiment showed that radicals are not responsible for RIE lag. Inhibitor depletion will result in inverse RIE lag. This effects is not found during our experimentation which leaves us with ion depletion to explain RIE lag. Depletion of ions is caused by ions captured by the sidewalls due to the angular distribution of incoming ions into the trench opening and the deflection of ions in the trench due to electrostatic fields. The analysis given in this paper indicates that the influencing field causes ion deflection, ion depletion, and therefore RIE lag in micron-sized Si trenches for low-energetic ions. In all cases, thus independent of the feature size, the angular distribution of incoming ions is thought to have a major contribution to RIE lag at higher pressures. These phenomena will be treated theoretically and simulated using a program, written in c++ under windows, in order to give a quantitative analysis of RIE lag.
Item Type:Article
Copyright:© 1997 Elsevier Science
Electrical Engineering, Mathematics and Computer Science (EEMCS)
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Link to this item:http://purl.utwente.nl/publications/14247
Official URL:https://doi.org/10.1016/S0167-9317(96)00142-6
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